DFT Design Engineer
looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away
looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away
looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away
programming, such as, C-shell, Makefile, Perl, or TCL languages in a UNIX environment Memory (compiler) and physical design
, debugging and modifying C/C++ based FW. Ability to review circuit schematics and identify board re-works. Good balance
PREFERRED EXPERIENCE: Advanced C++ and Python Development background Experience in designing APIs and integrating them
junior engineers Developing working procedures, flows and infra Handling complicated formal problems PREFERRED
your career. Responsibilities: THE ROLE: ASIC Design Engineer with hands-on experience across all aspects of IP RTL design
your career. THE ROLE: ASIC Design Engineer with hands-on experience across all aspects of IP RTL design, including
Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming…
Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming…
Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming…
Job Description: WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs,…
and infrastructure Develop and debug RTL designs using C-DPI directed test methodology, and/or using verification team’s testbenches...-of-art RTL design and verification methodology and be…
to enhance execution efficiency. Champion adoption of AI/ML-enabled tools and automation (e.g., layout optimization, design rule..., or advanced packaging technologies (e.g., chiplets, 2.5D…
cryptography, compression, and DMA Perform hardware/firmware co-verification using UVM System Verilog, C-DPI, and FPGA-based...- and subsystem-level test plans using UVM randomized and C-DP…
technologies. Strong, hands-on expertise in place & route (P&R), static timing analysis (STA), clock distribution, physical
and tools (e.g., high-speed SerDes, DDR, PCIE channel analysis) Working knowledge of computer and I/O protocols, such as PCIe
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